PYNQ-Z1: Python Productivity for Zynq-7000 ARM/FPGA SoC
PYNQ-Z1: Python Productivity for Zynq-7000 ARM/FPGA SoC, PYNQ-Z1: Python Productivity for Zynq-7000 ARM/FPGA SoC The PYNQ-Z1 board is designed to be used with PYNQ, a new open-source framework that enables embedded programmers to exploit the capabilities of Xilinx Zynq All Programmable SoCs (APSoCs) without having to design programmable logic circuits. Instead the APSoC is programmed using Python, with the code developed and tested directly on the PYNQ-Z1. The programmable logic circuits are imported as hardware libraries and programmed through their APIs in essentially the same way that the software libraries are imported and programmed. The PYNQ-Z1 board is the hardware platform for the PYNQ open-source framework. The software running on the ARM A9 CPUs includes: A web server hosting the Jupyter Notebook design environment The IPython kernel and packages Linux Base hardware library and API for the FPGA For designers who want to extend the base system by contributing new hardware libraries, Xilinx Vivado WebPACK tools are available free of cost. To find out more about PYNQ, please see the project webpage at www.pynq.io. Here you will find materials to help you get started and a forum for contacting the supporting community. Features ZYNQ XC7Z020-1CLG400C 650MHz dual-core Cortex-A9 processor DDR3 memory controller with 8 DMA channels and 4 High Performance AXI3 Slave ports High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO Low-bandwidth peripheral controller: SPI, UART, CAN, I2C Programmable from JTAG, Quad-SPI flash, and microSD card Programmable logic equivalent to Artix-7 FPGA 13,300 logic slices, each with four 6-input LUTs and 8 flip-flops 630 KB of fast block RAM 4 clock management tiles, each with a phase-locked loop (PLL) and mixed-mode clock manager (MMCM) 220 DSP slices On-chip analog-to-digital converter (XADC) Memory 512MB DDR3 with 16-bit bus @ 1050Mbps 16MB Quad-SPI Flash with factory programmed 48-bit globally unique EUI-48/64 compatible identifier microSD slot Power Powered from USB or any 7V-15V external power source USB and Ethernet Gigabit Ethernet PHY USB-JTAG Programming circuitry USB-UART bridge USB OTG PHY (supports host only) Audio and Video HDMI sink port (input) HDMI source port (output) Microphone with PDM interface PWM driven mono audio output with 3.5mm jack Switches, Push-buttons, and LEDs 4 push-buttons 2 slide switches 4 LEDs 2 RGB LEDs Expansion Connectors Two standard Pmod ports 16 Total FPGA I/O Arduino/chipKIT Shield connector 49 Total FPGA I/O 6 Single-ended 0-3.3V Analog inputs to XADC 4 Differential 0-1.0V Analog inputs to XADC Resources & Downloads Tutorials & Example Projects All support and project tutorials for PYNQ are found at the project webpage at www.pynq.io. Additional Resources Xilinx Vivado Workshop materials (off-site)